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Projects

FPGA Projects: MIPS 5-stage Pipeline Processor using Verilog HDL
Designed and implemented a fully functional pipeline MIPs processor and Morse Code decoder from scratch on a DE10-nano FPGA using SystemVerilog and Intel Quartus Prime.


RISC-V Trusted Execution Environment (TEE)
Made modifications to the Keystone Enclave.
Implemented a dynamic memory allocation plugin for the enclave to extend memory after creation, and TEE runtime page table management.
Implemented system calls in the TEE kernel, and RISC-V SBIs in the Security Monitor, and conducted benchmarks on the QEMU and VC707.


The Grim Scraper
A Selenium scraper for scraping websites, checking HTTP requests/responses, saving the resources, emulating logins, taking screenshots and finding interesting things inside the source code.


Phishing Pot
Contributed to the Phishing Pot, project by Corvo.
Phishing Pot is a collection of real phishing samples collected via honey pots.


Keystroke Injectors
Project for injecting keystrokes using scripts and Arduino BadUSB.